Commit 40524105 authored by Alexander Diewald's avatar Alexander Diewald
Browse files

Hier. Plat.: Support for Clock/Power distrib. networks.

Issue-Ref: 3981
Issue-Url: https://af3-developer.fortiss.org/issues/3981

Signed-off-by: Alexander Diewald's avatarAlexander Diewald <diewald@fortiss.org>
parent 5e8c466a
......@@ -164,6 +164,7 @@
<!-- Model connection compositors -->
<!--===============================-->
<extension point="org.fortiss.tooling.kernel.modelConnectionCompositor">
<!-- Port to interface (same level), Port to export (port at container level of export) -->
<modelConnectionCompositor modelConnectionCompositor="org.fortiss.af3.platform.hierarchic.compose.connections.PortInterfaceExportConnectionCompositor">
<source>
......@@ -545,6 +546,62 @@
</target>
</modelConnectionCompositor>
<!-- Power and clock distribution accross layers. The explicit specification of In and Out
Connectors is required for not triggering the default connection compositor. -->
<modelConnectionCompositor modelConnectionCompositor="org.fortiss.af3.platform.hierarchic.compose.connections.ClockPowerConnectionCompositor">
<source>
<modelElementClass modelElementClass="org.fortiss.af3.platform.hierarchic.model.electronics.ClockIn"/>
</source>
<target>
<modelElementClass modelElementClass="org.fortiss.af3.platform.hierarchic.model.electronics.ClockIn"/>
</target>
</modelConnectionCompositor>
<modelConnectionCompositor modelConnectionCompositor="org.fortiss.af3.platform.hierarchic.compose.connections.ClockPowerConnectionCompositor">
<source>
<modelElementClass modelElementClass="org.fortiss.af3.platform.hierarchic.model.electronics.PowerIn"/>
</source>
<target>
<modelElementClass modelElementClass="org.fortiss.af3.platform.hierarchic.model.electronics.PowerIn"/>
</target>
</modelConnectionCompositor>
<modelConnectionCompositor modelConnectionCompositor="org.fortiss.af3.platform.hierarchic.compose.connections.ClockPowerConnectionCompositor">
<source>
<modelElementClass modelElementClass="org.fortiss.af3.platform.hierarchic.model.electronics.PowerOut"/>
</source>
<target>
<modelElementClass modelElementClass="org.fortiss.af3.platform.hierarchic.model.electronics.PowerIn"/>
</target>
</modelConnectionCompositor>
<modelConnectionCompositor modelConnectionCompositor="org.fortiss.af3.platform.hierarchic.compose.connections.ClockPowerConnectionCompositor">
<source>
<modelElementClass modelElementClass="org.fortiss.af3.platform.hierarchic.model.electronics.PowerIn"/>
</source>
<target>
<modelElementClass modelElementClass="org.fortiss.af3.platform.hierarchic.model.electronics.PowerOut"/>
</target>
</modelConnectionCompositor>
<modelConnectionCompositor modelConnectionCompositor="org.fortiss.af3.platform.hierarchic.compose.connections.ClockPowerConnectionCompositor">
<source>
<modelElementClass modelElementClass="org.fortiss.af3.platform.hierarchic.model.electronics.ClockIn"/>
</source>
<target>
<modelElementClass modelElementClass="org.fortiss.af3.platform.hierarchic.model.electronics.ClockOut"/>
</target>
</modelConnectionCompositor>
<modelConnectionCompositor modelConnectionCompositor="org.fortiss.af3.platform.hierarchic.compose.connections.ClockPowerConnectionCompositor">
<source>
<modelElementClass modelElementClass="org.fortiss.af3.platform.hierarchic.model.electronics.ClockOut"/>
</source>
<target>
<modelElementClass modelElementClass="org.fortiss.af3.platform.hierarchic.model.electronics.ClockIn"/>
</target>
</modelConnectionCompositor>
<!--
Note that due to the required registration to handle the special case (Tile, WatchDog, Clock)
also all other connections involving Tiles to be explicitly registered.
......
ConnectionCompositorBase.java 14c859c7d3c19c25edb8884b21f8f2915c644b3d GREEN
GenericPlatformSourceTargetConnectorConnectionCompositorBase.java 656a00deecd529d1b22f168b779fafd660b1aa96 GREEN
GenericPlatformSourceTargetConnectorConnectionCompositorBase.java 1c996511209871a2b1c5fa52f3230abbefa4ca26 YELLOW
IArchitectureDomainDependant.java f7fef7e058ed9dcbaad3dbf5872f69d5fe508861 GREEN
IPlatformHierarchicalCompositionRules.java 648d414616d6413c44909d2bdd92e2936905c0e9 GREEN
PlatformArchitectureCompositorBase.java a0fc2716f45ea31bbed8e43ae02243cd83194ff1 GREEN
......
......@@ -37,6 +37,11 @@ public abstract class GenericPlatformSourceTargetConnectorConnectionCompositorBa
public boolean canConnect(S source, T target, IHierarchicElement parent,
IConnectionCompositionContext context) {
// Only use this compositor for elements of the same level.
if(source.eContainer().eContainer() != target.eContainer().eContainer()) {
return false;
}
@SuppressWarnings("unchecked") Class<? extends IArchitectureDomain> sourceClass =
(Class<? extends IArchitectureDomain>)source.getClass();
......
BusMemoryConnectionCompositor.java 81d8b07214b5ff6c56055ad6ea30a6bece1d0f0a GREEN
ClockPowerConnectionCompositor.java ce6d7e98364a0167e7c3341b0391d75a6c8821ec YELLOW
ClockTileConnectionCompositor.java 201d93eff305d57eb3db2b0170b6ad272a7126d0 GREEN
ClockWatchDogConnectionCompositor.java d8ce5b4bdccadbca14a679c988b241ebd768c90f GREEN
GenericPlatformSourceTargetConnectorConnectionCompositor.java fbd6381d55534fe3e2ca4c782c75e7c36d352805 GREEN
......
/*-------------------------------------------------------------------------+
| Copyright 2014 fortiss GmbH |
| |
| Licensed under the Apache License, Version 2.0 (the "License"); |
| you may not use this file except in compliance with the License. |
| You may obtain a copy of the License at |
| |
| http://www.apache.org/licenses/LICENSE-2.0 |
| |
| Unless required by applicable law or agreed to in writing, software |
| distributed under the License is distributed on an "AS IS" BASIS, |
| WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| See the License for the specific language governing permissions and |
| limitations under the License. |
+--------------------------------------------------------------------------*/
package org.fortiss.af3.platform.hierarchic.compose.connections;
import org.fortiss.af3.platform.hierarchic.compose.HierarchicalCompositionRules;
import org.fortiss.af3.platform.hierarchic.compose.base.GenericPlatformSourceTargetConnectorConnectionCompositorBase;
import org.fortiss.af3.platform.hierarchic.compose.base.IPlatformHierarchicalCompositionRules;
import org.fortiss.af3.platform.hierarchic.model.electronics.ClockIn;
import org.fortiss.af3.platform.hierarchic.model.electronics.ClockOut;
import org.fortiss.af3.platform.hierarchic.model.electronics.PowerIn;
import org.fortiss.af3.platform.hierarchic.model.electronics.PowerOut;
import org.fortiss.af3.platform.model.IArchitectureDomain;
import org.fortiss.af3.platform.model.PlatformConnectorUnit;
import org.fortiss.tooling.base.model.element.IHierarchicElement;
import org.fortiss.tooling.kernel.extension.data.IConnectionCompositionContext;
/**
* Specific connection compositor for connecting {@link PowerIn}/{@link PowerOut}s or
* {@link ClockIn}/{@link ClockOut}s. It supports connections from an upper layer to the current
* one. Used to model power and clock distribution networks.
*
* @author barner
*/
public class ClockPowerConnectionCompositor<S extends PlatformConnectorUnit & IArchitectureDomain, T extends PlatformConnectorUnit & IArchitectureDomain>
extends GenericPlatformSourceTargetConnectorConnectionCompositorBase<S, T> {
/** {@inheritDoc} */
@Override
public IPlatformHierarchicalCompositionRules getPlatformCompositionRules() {
return HierarchicalCompositionRules.INSTANCE;
}
/** {@inheritDoc} */
@Override
public boolean canConnect(S source, T target, IHierarchicElement parent,
IConnectionCompositionContext context) {
// Only allow one input per power and clock receiver.
boolean sourceIsInput = source instanceof PowerIn || source instanceof ClockIn;
boolean targetIsInput = target instanceof PowerIn || target instanceof ClockIn;
boolean sourceConnected =
!(source.getIncoming().isEmpty() && source.getOutgoing().isEmpty());
boolean targetConnected =
!(target.getIncoming().isEmpty() && target.getOutgoing().isEmpty());
if((sourceIsInput && sourceConnected) || (targetIsInput && targetConnected)) {
return false;
}
boolean powerInputConnectors = source instanceof PowerIn && target instanceof PowerIn;
boolean clockInputConnectors = source instanceof ClockIn && target instanceof ClockIn;
boolean oneIsUpperLayer = (source.eContainer() == target.eContainer().eContainer()) ||
(target.eContainer() == source.eContainer().eContainer());
boolean upperLayerConnection =
oneIsUpperLayer && (powerInputConnectors || clockInputConnectors);
boolean powerInToOutConnection = source instanceof PowerIn && target instanceof PowerOut ||
source instanceof PowerOut && target instanceof PowerIn;
boolean clockInToOutConnection = source instanceof ClockIn && target instanceof ClockOut ||
source instanceof ClockOut && target instanceof ClockIn;
boolean sameLayerCOnnection =
!oneIsUpperLayer && (powerInToOutConnection || clockInToOutConnection);
return upperLayerConnection || sameLayerCOnnection;
}
/** {@inheritDoc} */
@Override
public Class<? extends IArchitectureDomain> getArchitectureDomain() {
// TODO Auto-generated method stub
return null;
}
}
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