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toki
components
freertos-portable
Commits
2b1dbf10
Commit
2b1dbf10
authored
Jul 31, 2020
by
Ulrich Huber
Committed by
Oliver Horst
Aug 15, 2020
Browse files
[chg] Use toki-hal routine to initialize GIC
parent
514e397e
Changes
2
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GCC/ARM_CA53_64_BIT/include/freertos/portmacro.h
View file @
2b1dbf10
...
...
@@ -135,6 +135,12 @@ macros is used. */
handler for whichever peripheral is used to generate the RTOS tick. */
void
FreeRTOS_Tick_Handler
(
void
);
/*
* Ensure the interrupt controller instance variable is initialised before it is
* used, and that the initialisation only happens once.
*/
int32_t
prvEnsureInterruptControllerIsInitialised
(
void
);
/*
* Installs pxHandler as the interrupt handler for the peripheral specified by
* the ucInterruptID parameter.
...
...
GCC/ARM_CA53_64_BIT/src/freertos/port.c
View file @
2b1dbf10
...
...
@@ -28,6 +28,7 @@
/* Standard includes. */
#include
<stddef.h>
#include
<toki/hal/gic.h>
/* Scheduler includes. */
#include
"freertos/FreeRTOS.h"
...
...
@@ -182,11 +183,6 @@ __attribute__(( used )) const uint64_t ullMaxAPIPriorityMask = ( configMAX_API_C
*/
static
int32_t
prvInitialiseInterruptController
(
void
);
/* Ensure the interrupt controller instance variable is initialised before it is
* used, and that the initialisation only happens once.
*/
static
int32_t
prvEnsureInterruptControllerIsInitialised
(
void
);
/*
* See header file for description.
*/
...
...
@@ -302,7 +298,7 @@ int32_t lReturn;
}
/*-----------------------------------------------------------*/
static
int32_t
prvEnsureInterruptControllerIsInitialised
(
void
)
int32_t
prvEnsureInterruptControllerIsInitialised
(
void
)
{
static
int32_t
lInterruptControllerInitialised
=
pdFALSE
;
int32_t
lReturn
;
...
...
@@ -329,19 +325,9 @@ int32_t lReturn;
static
int32_t
prvInitialiseInterruptController
(
void
)
{
BaseType_t
xStatus
;
XScuGic_Config
*
pxGICConfig
;
/* Initialize the interrupt controller driver. */
pxGICConfig
=
XScuGic_LookupConfig
(
configINTERRUPT_CONTROLLER_DEVICE_ID
);
xStatus
=
XScuGic_CfgInitialize
(
&
xInterruptController
,
pxGICConfig
,
pxGICConfig
->
CpuBaseAddress
);
/* Connect the interrupt controller interrupt handler to the hardware
interrupt handling logic in the ARM processor. */
Xil_ExceptionRegisterHandler
(
XIL_EXCEPTION_ID_IRQ_INT
,
(
Xil_ExceptionHandler
)
XScuGic_InterruptHandler
,
&
xInterruptController
);
/* Enable interrupts in the ARM. */
Xil_ExceptionEnable
();
BaseType_t
xStatus
=
pdPASS
;
vInitGlobalInterruptController
();
/* Test GIC for operational state */
xStatus
|=
XScuGic_SelfTest
(
&
xInterruptController
);
...
...
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