Commit a3b890b7 authored by Oliver Horst's avatar Oliver Horst
Browse files

[chg] Smaller code re-organizations and formattings

parent fcf40e8b
#ifndef STM_TRACE_H
#define STM_TRACE_H
#ifndef FREERTOSPLUS_TRACE_STM_TRACE_H
#define FREERTOSPLUS_TRACE_STM_TRACE_H
#include "xil/xil_io.h"
#if !defined (__aarch64__)
#error "Unsupported Processor Type"
#endif
/*******************************************************************************
* DEFINES
*******************************************************************************/
/*
* \brief Macros to create trace records
* DEFINES
*******************************************************************************/
/* \brief Macros to create trace records
*
* \param port A natural number indicating the number of the stimulus port (channel).
* \param type The trace record type. One of the fields in stim_port_t.
* \param data The data to write to the stimulus port.
*
*
* A possible use of these macros could look like this: STM_TRACE_8(0, G_DMTS, 42);
*/
#define STM_TRACE_8(port, type, data) Xil_Out8(&drvdata.axi->ports[port].type, data)
#define STM_TRACE_16(port, type, data) Xil_Out16(&drvdata.axi->ports[port].type, data)
#define STM_TRACE_32(port, type, data) Xil_Out32(&drvdata.axi->ports[port].type, data)
#define STM_TRACE_64(port, type, data) Xil_Out64(&drvdata.axi->ports[port].type, data)
#define STM_TRACE_8(port, type, data) Xil_Out8( &xSTMTraceDrvData.axi->ports[port].type, data )
#define STM_TRACE_16(port, type, data) Xil_Out16( &xSTMTraceDrvData.axi->ports[port].type, data )
#define STM_TRACE_32(port, type, data) Xil_Out32( &xSTMTraceDrvData.axi->ports[port].type, data )
#define STM_TRACE_64(port, type, data) Xil_Out64( &xSTMTraceDrvData.axi->ports[port].type, data )
/*******************************************************************************
* TYPEDEFS
*******************************************************************************/
* TYPEDEFS
*******************************************************************************/
typedef volatile uint64_t stim_t;
/**
......@@ -59,17 +65,17 @@ typedef struct {
/**
* \brief Á struct that helps to access the STM stimulus ports.
*/
struct stm_axi {
typedef struct {
stim_port_t ports[0];
};
} stm_axi_t;
/**
* \brief A struct containing all parameters necessary to configure STM.
* This includes all register values and the addresses of the interfaces.
*/
struct stm_drvdata {
typedef struct {
void *base;
struct stm_axi *axi;
stm_axi_t *axi;
u8 traceid;
u32 write_bytes;
u32 stmsper;
......@@ -79,24 +85,20 @@ struct stm_drvdata {
u32 stmheer;
u32 stmheter;
u32 stmhebsr;
};
} stm_drvdata_t;
/*******************************************************************************
* FUNCTIONS
*******************************************************************************/
extern struct stm_drvdata drvdata;
* VARIABLES
*******************************************************************************/
extern stm_drvdata_t xSTMTraceDrvData;
/*******************************************************************************
* FUNCTIONS
*******************************************************************************/
/**
* \brief Enable timestamping. ENABLE THIS BEFORE turning on stm tracing.
*/
void timestamp_enable();
/**
* \brief Enable STM tracing.
*/
int stm_enable();
* FUNCTIONS
*******************************************************************************/
void stm_trace_init();
#endif /* STM_TRACE_H */
#endif /* FREERTOSPLUS_TRACE_STM_TRACE_H */
......@@ -3,4 +3,4 @@ cmake_minimum_required(VERSION 3.7 FATAL_ERROR)
add_subdirectory(hal)
add_subdirectory(memguard)
add_subdirectory(perfmon)
add_subdirectory(trace)
add_subdirectory(stm-trace)
......@@ -4,5 +4,5 @@ target_sources(
freertos-portable
#
PRIVATE
"${CMAKE_CURRENT_LIST_DIR}/stm_trace.c"
"${CMAKE_CURRENT_LIST_DIR}/trace.c"
)
......@@ -19,59 +19,68 @@
#include "freertos/FreeRTOS.h"
#if ENABLE_stm_trace == 1
#include "freertos+/stm-trace/trace.h"
#include "freertos/task.h"
#include "freertos+/trace/stm_trace.h"
#if ENABLE_stm_trace == 1
#include "xil/xil_io.h"
#include "xil/csparameters.h"
#include <stdio.h>
#define STMDMASTARTR 0xc04
#define STMDMASTOPR 0xc08
#define STMDMASTATR 0xc0c
#define STMDMACTLR 0xc10
#define STMDMAIDR 0xcfc
#define STMHEER 0xd00
#define STMHETER 0xd20
#define STMHEBSR 0xd60
#define STMHEMCR 0xd64
#define STMHEMASTR 0xdf4
#define STMHEFEAT1R 0xdf8
#define STMHEIDR 0xdfc
#define STMSPER 0xe00
#define STMSPTER 0xe20
#define STMPRIVMASKR 0xe40
#define STMSPSCR 0xe60
#define STMSPMSCR 0xe64
#define STMSPOVERRIDER 0xe68
#define STMSPMOVERRIDER 0xe6c
#define STMSPTRIGCSR 0xe70
#define STMTCSR 0xe80
#define STMTSSTIMR 0xe84
#define STMTSFREQR 0xe8c
#define STMSYNCR 0xe90
#define STMAUXCR 0xe94
#define STMSPFEAT1R 0xea0
#define STMSPFEAT2R 0xea4
#define STMSPFEAT3R 0xea8
#define STMITTRIGGER 0xee8
#define STMITATBDATA0 0xeec
#define STMITATBCTR2 0xef0
#define STMITATBID 0xef4
#define STMITATBCTR0 0xef8
#define writel_relaxed(v,c) Xil_Out32((UINTPTR) c,v)
#define writew_relaxed(v,c) Xil_Out16((UINTPTR) c,v)
#define CORESIGHT_LAR 0xfb0
#define mb() __asm__ __volatile__("dsb sy": : :"memory")
#define CORESIGHT_UNLOCK 0xc5acce55
struct stm_drvdata drvdata = {
/*******************************************************************************
* LOCAL DEFINES
*******************************************************************************/
#define STMDMASTARTR 0xc04
#define STMDMASTOPR 0xc08
#define STMDMASTATR 0xc0c
#define STMDMACTLR 0xc10
#define STMDMAIDR 0xcfc
#define STMHEER 0xd00
#define STMHETER 0xd20
#define STMHEBSR 0xd60
#define STMHEMCR 0xd64
#define STMHEMASTR 0xdf4
#define STMHEFEAT1R 0xdf8
#define STMHEIDR 0xdfc
#define STMSPER 0xe00
#define STMSPTER 0xe20
#define STMPRIVMASKR 0xe40
#define STMSPSCR 0xe60
#define STMSPMSCR 0xe64
#define STMSPOVERRIDER 0xe68
#define STMSPMOVERRIDER 0xe6c
#define STMSPTRIGCSR 0xe70
#define STMTCSR 0xe80
#define STMTSSTIMR 0xe84
#define STMTSFREQR 0xe8c
#define STMSYNCR 0xe90
#define STMAUXCR 0xe94
#define STMSPFEAT1R 0xea0
#define STMSPFEAT2R 0xea4
#define STMSPFEAT3R 0xea8
#define STMITTRIGGER 0xee8
#define STMITATBDATA0 0xeec
#define STMITATBCTR2 0xef0
#define STMITATBID 0xef4
#define STMITATBCTR0 0xef8
#define writel_relaxed(v,c) Xil_Out32((UINTPTR) c,v)
#define writew_relaxed(v,c) Xil_Out16((UINTPTR) c,v)
#define CORESIGHT_LAR 0xfb0
#define mb() __asm__ __volatile__("dsb sy": : :"memory")
#define CORESIGHT_UNLOCK 0xc5acce55
/*******************************************************************************
* GLOBAL VARIABLES
*******************************************************************************/
stm_drvdata_t xSTMTraceDrvData = {
.base = (void *)( CS_STM_BASE ),
.axi = (struct stm_axi *)( CS_STM_AXI_BASE ),
.axi = (stm_axi_t *)( CS_STM_AXI_BASE ),
.stmspscr = CS_STMSPSCR,
.stmsper = CS_STMSPER,
......@@ -84,6 +93,11 @@ struct stm_drvdata drvdata = {
.stmhebsr = CS_STMHEBSR,
};
/*******************************************************************************
* FUNCTIONS
*******************************************************************************/
/**
* \brief Lock the Coresight configuration registers.
*
......@@ -121,7 +135,7 @@ static inline void CS_UNLOCK(void *addr)
*
* \param drvdata Struct containing the STM configuration
*/
static void stm_hwevent_enable_hw(struct stm_drvdata *drvdata)
static void stm_hwevent_enable_hw( stm_drvdata_t *drvdata )
{
CS_UNLOCK(drvdata->base);
......@@ -140,7 +154,7 @@ static void stm_hwevent_enable_hw(struct stm_drvdata *drvdata)
*
* \param drvdata Struct containing the STM configuration
*/
static void stm_port_enable_hw(struct stm_drvdata *drvdata)
static void stm_port_enable_hw( stm_drvdata_t *drvdata )
{
CS_UNLOCK(drvdata->base);
/* ATB trigger enable on direct writes to TRIG locations */
......@@ -158,43 +172,41 @@ static void stm_port_enable_hw(struct stm_drvdata *drvdata)
*
* \param drvdata Struct containing the STM configuration
*/
static void stm_enable_hw(struct stm_drvdata *drvdata)
static void stm_enable_hw( stm_drvdata_t *drvdata )
{
if (drvdata->stmheer)
stm_hwevent_enable_hw(drvdata);
if ( drvdata->stmheer )
{
stm_hwevent_enable_hw( drvdata );
}
stm_port_enable_hw(drvdata);
stm_port_enable_hw( drvdata );
CS_UNLOCK(drvdata->base);
CS_UNLOCK( drvdata->base );
/* 4096 byte between synchronisation packets */
writel_relaxed(0xFFF, drvdata->base + STMSYNCR);
writel_relaxed((drvdata->traceid << 16 | /* trace id */
0x02 | /* timestamp enable */
0x01), /* global STM enable */
drvdata->base + STMTCSR);
writel_relaxed( 0xFFF, drvdata->base + STMSYNCR );
writel_relaxed( (drvdata->traceid << 16 | /* trace id */
0x02 | /* timestamp enable */
0x01), /* global STM enable */
drvdata->base + STMTCSR );
CS_LOCK(drvdata->base);
CS_LOCK( drvdata->base );
}
/*
* \brief Set the STM parameters to suitable values and enable STM.
*/
int stm_enable()
static void timestamp_enable()
{
stm_enable_hw(&drvdata);
volatile int *ts_enable = (volatile int *)( CS_TS_BASE + CS_TS_ENABLE_OFFSET );
volatile int *ts_freq = (volatile int *)( CS_TS_BASE + CS_TS_FREQ_OFFSET );
*ts_freq = configTS_GEN_FREQUENCY;
return 0;
*ts_enable = 0x1 | ( configTS_GEN_DEBUG_HALT << 1 );
}
void timestamp_enable()
void stm_trace_init()
{
volatile int *ts_enable = (volatile int *) (CS_TS_BASE + CS_TS_ENABLE_OFFSET);
volatile int *ts_freq = (volatile int *) (CS_TS_BASE + CS_TS_FREQ_OFFSET);
*ts_freq = configTS_GEN_FREQUENCY;
*ts_enable = 0x1 | (configTS_GEN_DEBUG_HALT << 1);
timestamp_enable();
stm_enable_hw( &xSTMTraceDrvData );
}
#endif /* ENABLE_stm_trace == 1 */
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