[add] Add routine to set comparison value of TSU

include/common/xil/drivers/xemacps.h

@@ -766,6 +766,17 @@ typedef struct XEmacPs_Instance {
         (High & XEMACPS_RXWM_HIGH_MASK) |  \
         ((Low << XEMACPS_RXWM_LOW_SHFT_MSK) & XEMACPS_RXWM_LOW_MASK) |)
 
+#define XEmacPs_SetTSUCmpVal(InstancePtr, cmp_val)                         \
+        XEmacPs_WriteReg((InstancePtr)->Config.BaseAddress,                \
+        XEMACPS_1588_SEC_CMP_MSB_OFFSET,                                   \
+        (cmp_val.tv_sec & 0x000000FF00000000U) >> 32U);                   \
+        XEmacPs_WriteReg((InstancePtr)->Config.BaseAddress,                \
+        XEMACPS_1588_SEC_CMP_OFFSET,                                       \
+        (cmp_val.tv_sec & 0x00000000FFFFFFFFU));                          \
+        XEmacPs_WriteReg((InstancePtr)->Config.BaseAddress,                \
+        XEMACPS_1588_NSEC_CMP_OFFSET,                                      \
+        (cmp_val.tv_nsec & 0xFFFFFC0000000000U));
+
 /****************************************************************************/
 /**
 *

include/common/xil/drivers/xemacps_hw.h

@@ -261,6 +261,9 @@ typedef enum { MDC_DIV_8 = 0U, MDC_DIV_16, MDC_DIV_32, MDC_DIV_48,
 						      increment counter */
 #define XEMACPS_1588_SUBNS_INC_OFFSET   0x000001BCU /**< 1588 sub nanosecond
 						      increment counter */
+#define XEMACPS_1588_SEC_CMP_OFFSET     0x000000E0U
+#define XEMACPS_1588_SEC_CMP_MSB_OFFSET 0x000000E4U
+#define XEMACPS_1588_NSEC_CMP_OFFSET    0x000000DCU
 #define XEMACPS_PTP_TXSEC_OFFSET     0x000001E0U /**< 1588 PTP transmit second
 						      counter */
 #define XEMACPS_PTP_TXNANOSEC_OFFSET 0x000001E4U /**< 1588 PTP transmit
@@ -474,6 +477,7 @@ typedef enum { MDC_DIV_8 = 0U, MDC_DIV_16, MDC_DIV_32, MDC_DIV_48,
  * XEMACPS_IER_OFFSET, XEMACPS_IDR_OFFSET, and XEMACPS_IMR_OFFSET
  * @{
  */
+#define XEMACPS_IXR_TSU_CMP_MASK    0x20000000U
 #define XEMACPS_IXR_PTPPSTX_MASK	0x02000000U /**< PTP Pdelay_resp TXed */
 #define XEMACPS_IXR_PTPPDRTX_MASK	0x01000000U /**< PTP Pdelay_req TXed */
 #define XEMACPS_IXR_PTPPSRX_MASK	0x00800000U /**< PTP Pdelay_resp RXed */