GitLab

Merged branch 'upstream/xilinx' into next

Xilinx BSP 2020.2 fetched from https://github.com/Xilinx/embeddedsw.git

Branch/Tag: release-2020.2
SHA1 ID: 2516d5ed8161e16c2813b0e8e4ceac693f23de5c

Restructured with toki-baseliner, revision a2114bf.

Xilinx BSP 2020.1 fetched from https://github.com/Xilinx/embeddedsw.git

Branch/Tag: release-2020.1
SHA1 ID: 338150ab3628a1ea6b06e964b16e712b131882dd

Restructured with toki-baseliner, revision a2114bf.

Xilinx BSP 2019.2 fetched from https://github.com/Xilinx/embeddedsw.git

Branch/Tag: release-2019.2
SHA1 ID: e8db5fb118229fdc621e0ec7848641a23bf60998

Restructured with toki-baseliner, revision a2114bf.

- Added ARM CoreSight STM and timestamping driver
- Added Xil_CpuMutexWait and Xil_CpuMutexPost methods
- Fixed GIC driver behavior when multiple cores want to claim an interrupt

[chg] Fix timestamp availability mask and introduce buffer descriptor control register offsets and masks

- Corrected include directives to the right includes
- Added a dependency to toki-libc-headers
- Replaced xil_printf with toki-libc-printf

Xilinx BSP 2019.1 fetched from file:///home/horst/downloads/mirror/embeddedsw

Branch/Tag: release-2019.1
SHA1 ID: 26c14d9861010a0e3a55c73fb79efdb816eb42ca

Restructured with toki-baseliner, revision 7dc0f8e (dirty).

Xilinx BSP 2018.3 fetched from file:///home/horst/downloads/mirror/embeddedsw

Branch/Tag: release-2018.3
SHA1 ID: 5b3764e8eb42e543f411f6ec3ed31c7112c6e178

Restructured with toki-baseliner, revision 7dc0f8e (dirty).